搜索资源列表
Butterworth_IIR_Filter
- DSP中巴特沃思滤波器的设计使用Verilog编写.
verilogppt
- 经典的verilog语言学习课件,介绍了语言的基础知识,和实际中该语言的应用包括DSP 设计中的各个方面.-classic Verilog language-learning courseware, introduced a basic knowledge of language, and the reality of the language of applications including DSP design in all its aspects.
LED47DISP
- 4-7segment led display Verilog code. Implemented at Stratix EP1S25 DSP development board.-4-7segment led display Verilog code. Impl emented at Stratix EP1S25 DSP development boar d.
echo_dj
- verilog写的回波抵消程序，相当于写了个回波抵消的芯片，不是dsp，可编译后下载于FPGA,绝对原创，写了很长时间。-Verilog echo canceller written procedures, wrote the equivalent of echo canceller chip, not dsp, can be downloaded from the compiled FPGA, absolute originality, writing for a long time.
cpci1
- 针对多DSP 共享总线的通用信号处理板卡, 介绍了基于PCI9054 和CPCI 总线的接口设计, 分析了通用WDM总线驱动程序的开发。采用Verilog HDL 用CPLD 设计控制时序实现了DSP 和 CPCI 总线桥接器PCI9054 之间的普通传输和高速DMA 传输。驱动程序采用DriverWorks 和Windows 驱动开发包DDK 进行开发, 具有很好的通用性和可移植性。
Lattice_Verilog
- 本文讨论了AR模型及线性预测的原理，在浮点型DSP TMS320C6713B上实现了语音信号线性预测系数(LPC)的提取，并利用LPC系数用Verilog语言实现了AR模型的Lattice结构。
Tun2CNk2
- FPGA实现DSP的Verilog 示例
two_d_dct_serial
- altera公司提供的适用于包涵DSP内核的FPGA的二维DCT变换源码，语言是：verilog 性能不错，不过资源消耗有点大，可以用来学习多项式变换的DCT算法-ALTERA companies covered in the application of FPGA DSP core 2D DCT source language is : Verilog performance is good, but a bit large consumption of resources can be us
H_2048x4096
- LDPC 码二进制规则码生成矩阵2048*4096，效果很理想-LDPC code rules binary code generated matrix 2048* 4096, the effect is very satisfactory
PLL
- 可以实现自动锁相环功能的C源程序代码模块，-Can be achieved automatically PLL function C source code modules,
verilog
- 基于DSP和FPGA的CCD 图像采集系统设计与实现-FPGA-based DSP and CCD image acquisition system design and implementation
Digital-Signal-Processing-with-FPGA
- FPGA结合DSP设计，如FIR、IIR滤波器，CORDIC算法,多重采样率信号处理，FFT,有对应的VHDL/Verilog 代码code-FPGA Combines with DSP, FIR 、IIR Digital Filters,CORDIC,FFT,Adaptive Filters，VHDL/Verilog code
DSP-with-FPGA(3rd)
- 国外权威著作-数字信号处理的FPGA实现（第三版）的源代码，包括VHDL和verilog两种格式。-Foreign authoritative writings- digital signal processing on FPGA (third edition) of the source code, including VHDL and verilog formats.
verilog
- 把32位的数据转换成8位数据输出，用做fpga把数据传给dsp处理-The 32-bit data into 8 bits of data output
FPGA-implementation-of-dsp
- 《数字信号处理的FPGA实现》一书的源代码，包括verilog和VHDL版本。该书是算法的硬件实现的权威书籍。-" FPGA digital signal processing," a book of the source code, including verilog and VHDL versions. The book is the definitive book on the algorithm for hardware implementation.
dsp-with-FPGA--verilog_code
- FPGA DSP算法实现代码，做FPGA的非常值得看一看。-dsp with FPGA verilog code
dsp
- DSP Architechture using Verilog. (the concept of the programm differ the original)-DSP Architechture using Verilog. (the concept of the programm differ the original)
Verilog-codes-on-various-logical-functions
- Useful verilog programs on various logical functions like D Flip-Flop, DSP butterfly unit, Multiplexers, etc.
数字信号处理的FPGA实现-第三版-verilog源程序
- 数字信号处理的FPGA实现, 包括了FPGA基础知识，浮点运算，信号处理的FIR FFT等，附录包含源代码(Digital signal processing FPGA implementation, including the basic knowledge of FPGA, floating point operations, signal processing FIR, FFT, etc., the appendix contains the source code)
fpga
- pid算法控制电机运动，实现fpga与dsp的双口RAM通信(PID algorithm to control motor movement, the realization of FPGA and DSP dual port RAM communication)